<div>Thanks. I knew about the macros to change the csl register values but I was curious where I could find a definition of the registers or what they are defined to be (I wanted to get more information about them beyond the scope of what is shown on the FFT EDMA lecture notes). SPRU401 really helps. :)</div>
<div> </div>
<div>~Alan<br><br></div>
<div class="gmail_quote">On Sun, Oct 18, 2009 at 8:43 PM, Joseph Haber <span dir="ltr"><<a href="mailto:josephhaber@gmail.com">josephhaber@gmail.com</a>></span> wrote:<br>
<blockquote class="gmail_quote" style="PADDING-LEFT: 1ex; MARGIN: 0px 0px 0px 0.8ex; BORDER-LEFT: #ccc 1px solid">Alan,<br><br>Check out slide 33 in the lecture notes. What you will be using is the "Chip Support Library," or the CSL. Remember in the second lecture when I mentioned that in the "old days" you would get a header file that defined all the registers, but now you operate through the CSL. This defines a whole set of macros to set registers, fields, etc.<br>
<br>For example, there is the macro EDMA_RSET that allows you to directly access the QOPT, QSRC, etc. registers.<br><br>EDMA_RSET(QOPT,0x21300001);//32bitshighpriorityTCC0<br><br>See Section 7 EDMA Module in Spru401 (which is available in the help menu from CCS 3.1).<br>
<font color="#888888"><br>Joseph</font>
<div>
<div></div>
<div class="h5"><br><br>
<div class="gmail_quote">On Sun, Oct 18, 2009 at 7:48 PM, Alan Ding <span dir="ltr"><<a href="mailto:alan33d@gmail.com" target="_blank">alan33d@gmail.com</a>></span> wrote:<br>
<blockquote class="gmail_quote" style="PADDING-LEFT: 1ex; MARGIN: 0pt 0pt 0pt 0.8ex; BORDER-LEFT: rgb(204,204,204) 1px solid">Thanks Doug.<br><br>I'm also having a tough time locating register definitions from the lecture notes:<br>
<br>CIPR<br>QOPT...etc.<br><br>I found the macros in csl_edmahal.h which was not part of the example project.<br><font color="#888888"><br>~Alan</font>
<div>
<div></div>
<div><br><br>
<div class="gmail_quote">On Sun, Oct 18, 2009 at 7:39 PM, Doug Wenstrand <span dir="ltr"><<a href="mailto:doug@echelonembedded.com" target="_blank">doug@echelonembedded.com</a>></span> wrote:<br>
<blockquote class="gmail_quote" style="PADDING-LEFT: 1ex; MARGIN: 0pt 0pt 0pt 0.8ex; BORDER-LEFT: rgb(204,204,204) 1px solid">Yea, I forgot to time it and fill in the requirement. Your presumption of course is correct -- We want you to use QDMA to do it efficiently, but you need not worry about overlapping the transfers with computations.
<div><br></div>
<div>So -- the following pseudocode is what would meet the timing requirement:</div>
<div><br></div>
<div>loop:</div>
<div>dma data in</div>
<div>wait for it</div>
<div>fft</div>
<div>dma data out</div>
<div><br><br>
<div class="gmail_quote">
<div>
<div></div>
<div>On Sun, Oct 18, 2009 at 6:46 PM, Alan Ding <span dir="ltr"><<a href="mailto:alan33d@gmail.com" target="_blank">alan33d@gmail.com</a>></span> wrote:<br></div></div>
<blockquote class="gmail_quote" style="PADDING-LEFT: 1ex; MARGIN: 0pt 0pt 0pt 0.8ex; BORDER-LEFT: rgb(204,204,204) 1px solid">
<div>
<div></div>
<div>For the requirements on the back of the lab, it states that our STFT "must take less than xx ms". What exactly is xx? ~1.7ms*100 or ~48ms*100? I take it you guys want us to get roughly the first timing requirement using QDMA. <br>
<br>When we first capture the data in ext ram from CCS. The instructions wants us to create a plot of this data in CCS. How do you do that? Should we use the Graph function under the view tab? What options should we use for it?<br>
<br>Thanks,<br clear="all"><font color="#888888"><br>-- <br>-------------------------------------------------------<br>Alan Ding<br>Master of Sci, Electrical Engineering<br>Johns Hopkins University<br><br>Email: <a href="mailto:alan33d@gmail.com" target="_blank">alan33d@gmail.com</a><br>
Contact #: 4844593290<br></font><br></div></div>_______________________________________________<br>Dspforum mailing list<br><a href="mailto:Dspforum@echelonembedded.com" target="_blank">Dspforum@echelonembedded.com</a><br>
<a href="http://echelonembedded.com/mailman/listinfo/dspforum_echelonembedded.com" target="_blank">http://echelonembedded.com/mailman/listinfo/dspforum_echelonembedded.com</a><br><br></blockquote></div><br></div><br>_______________________________________________<br>
Dspforum mailing list<br><a href="mailto:Dspforum@echelonembedded.com" target="_blank">Dspforum@echelonembedded.com</a><br><a href="http://echelonembedded.com/mailman/listinfo/dspforum_echelonembedded.com" target="_blank">http://echelonembedded.com/mailman/listinfo/dspforum_echelonembedded.com</a><br>
<br></blockquote></div><br><br clear="all"><br>-- <br>-------------------------------------------------------<br>Alan Ding<br>Master of Sci, Electrical Engineering<br>Johns Hopkins University<br><br>Email: <a href="mailto:alan33d@gmail.com" target="_blank">alan33d@gmail.com</a><br>
Contact #: 4844593290<br></div></div><br>_______________________________________________<br>Dspforum mailing list<br><a href="mailto:Dspforum@echelonembedded.com" target="_blank">Dspforum@echelonembedded.com</a><br><a href="http://echelonembedded.com/mailman/listinfo/dspforum_echelonembedded.com" target="_blank">http://echelonembedded.com/mailman/listinfo/dspforum_echelonembedded.com</a><br>
<br></blockquote></div><br></div></div><br>_______________________________________________<br>Dspforum mailing list<br><a href="mailto:Dspforum@echelonembedded.com">Dspforum@echelonembedded.com</a><br><a href="http://echelonembedded.com/mailman/listinfo/dspforum_echelonembedded.com" target="_blank">http://echelonembedded.com/mailman/listinfo/dspforum_echelonembedded.com</a><br>
<br></blockquote></div><br><br clear="all">
<div></div><br>-- <br>-------------------------------------------------------<br>Alan Ding<br>Master of Sci, Electrical Engineering<br>Johns Hopkins University<br><br>Email: <a href="mailto:alan33d@gmail.com">alan33d@gmail.com</a><br>
Contact #: 4844593290<br>